1. Field of the Invention
This invention relates generally to the elimination of possible voiding of etch resistant material in vias in semiconductor device fabrication. In particular, this invention relates to the elimination of voiding of spin-on bottom anti-reflection coating (BARC) material in vias using a dual bake in semiconductor device fabrication.
2. Description of the Related Art
In certain processes of making semiconductor devices, a via or hole is etched through an insulating dielectric layer to expose an underlying layer, and the insulating dielectric layer is then etched again to form a wider trench above the via or contact hole. For example, in a via first dual inlaid dual damascene process, via holes are first etched, and then overlying trenches connecting respective via holes are formed in an inter-level dielectric (ILD). The trenches and vias are then filled with a conductive material that connects to underlying conducting material on the device through the via holes. In this process a via hole is first etched in a hole formation etch, and then exposed to a second etch in the trench formation etch. In this case, the second etch exposes any layer exposed by the hole to the etchant in the second etch.
According to an embodiment of the present invention there is provided a method for forming a semiconductor device. The method comprises forming a first layer over a semiconductor substrate. At least one hole is formed through the first layer. A bottom anti-reflective coating (BARC) layer is formed in the at least one hole. A first heating is performed to heat the BARC layer to a flow temperature. A second heating is performed to heat the BARC layer to a hardening temperature so that the BARC layer hardens, wherein the hardening temperature is greater than the flow temperature. An etch is performed to form a trench in the first layer and over the at least one hole, wherein the hardened BARC layer in the at least one hole acts as an etch resistant layer during the etch.
According to another embodiment of the present invention there is provided a method for forming a semiconductor device. The method comprises forming a first layer over a semiconductor substrate. A first etch is performed to form a plurality of holes through the first layer. A bottom anti-reflective coating (BARC) layer is formed over the first layer and in the plurality of holes. The BARC layer is heated to a flow temperature so that the BARC layer flows to fill any voids present in the plurality of holes. The BARC layer is hardened after heating the BARC layer to a flow temperature. A second etch is performed to form a trench in the first layer and over the at least one hole, wherein the hardened BARC layer in the at least one hole acts as an etch resistant layer during the second etch.
According to another embodiment of the present invention there is provided a method for forming a semiconductor device. The method comprises forming a first layer over a semiconductor substrate. At least one hole is formed through the first layer. A bottom anti-reflective coating (BARC) layer is formed in the at least one hole. The semiconductor substrate is placed in a heating chamber. A first heating is performed within the heating chamber to heat the BARC layer to a flow temperature. A second heating is performed within the heating chamber to heat the BARC layer to a hardening temperature so that the BARC layer hardens, wherein the hardening temperature is greater than the flow temperature, wherein the first heating and the second heating are performed in the heating chamber without removing the semiconductor substrate. An etch is performed to form a trench in the first layer and over the at least one hole, wherein the hardened BARC layer in the at least one hole acts as an etch resistant layer during the etch.